1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a semiconductor device having chips arranged in a surface of a semiconductor wafer and a method of manufacturing the same.
2. Description of the Background Art
There is a technical trend toward miniaturization of a pattern for higher density of transistor cells in a semiconductor device for the purpose of improving performance. Pattern miniaturization techniques not only improve chip performance, but also have the effect of reducing cost owing to reduction in chip size. Semiconductor chips are arranged in matrix form on a silicon wafer, and subjected to several wafer manufacturing steps such as deposition, diffusion, transfer, and processing, to be manufactured as a product.
In recent years, with miniaturization of design rule, a transfer device mainly uses a stepper of performing exposure for each shot in a step and repeat process. A stepper can use a mask pattern having a size five times the size of a pattern to be transferred onto a wafer. Accordingly, a stepper has the advantage of being able to transfer a finer pattern than in a conventional mirror projection system of performing exposure so that a transfer pattern and a mask pattern have the same size.
In etching process, etching solutions vary depending on a material for a film to be etched and the like. When a silicon oxide film is etched, for example, etching is performed with a hydrofluoric acid-based solution through the use of a resist pattern having been formed in a transfer step as a mask. In this method, reaction with the etching solution proceeds in a vertical direction as well as a horizontal direction of a pattern, resulting in an etched bowl shape. This etching, which proceeds in a vertical direction and a horizontal direction, is called isotropic etching. With miniaturization in recent years, this etching has been replaced with dry etching in which etching is performed under vacuum with a Freon type gas. Dry etching, by which an etching pattern having substantially the same horizontal size as that of a resist pattern is obtained, is called anisotropic etching.
Dry etching is commonly employed for a miniaturized pattern in order to improve stability of a finished dimension. In anisotropic dry etching, a thin material layer (sidewall protection film) is formed on sidewall surfaces during etching to block etching in a horizontal direction, so that a substantially vertical opening shape can be obtained.
This sidewall protection film is a polymerized film formed in plasma, or a silicon oxide film generated from a material to be etched during silicon etching. When a mask having a fine opening pattern is arranged on a wafer to perform silicon etching, for example, nonuniform arrangement of the opening pattern on the wafer results in lower supply of a silicon oxide film as the sidewall protection film. Particularly when a blank region where chips are not arranged (region not to be etched) is provided at an edge of a wafer, supply of a silicon oxide film (sidewall protection film) during silicon etching becomes lower in the vicinity of the blank region. As a result, the sidewall protection film is decreased and a pattern formation failure such as an overhang is likely to occur. By way of example, Japanese Patent Laying-Open No. 2003-264227 discloses formation of such sidewall protection film and trench shapes that vary due to a nonuniform aperture ratio of an opening pattern.
In order to eliminate the nonuniformity of an aperture ratio, in a process requiring a fine pattern, the blank region is not formed but an opening pattern is arranged on the entire surface of a wafer.
An end portion (edge portion) of a silicon wafer is uneven, like an intermediate portion thereof, and is beveled with approximately 10 to 20 degrees in order to prevent wafer chipping. Accordingly, when a pattern is formed on the entire surface of the wafer, the pattern is also formed on the beveled region.
Since a beveled region has an unstable shape and an unstable thickness of an applied photoresist, patterning in a transfer step is performed in an unstable state in the vicinity of the beveled region. If the process varies in this state, a pattern resolution failure and a foreign object due to a resist residue occur.
In order to prevent such pattern failure at a wafer edge portion, an edge rinse method in which an organic solvent is delivered to a wafer edge portion after application of a resist to remove the resist in the edge (e.g., 3 mm) region, a peripheral exposure method in which only a wafer edge portion is exposed after application of a resist to similarly remove the resist in the edge region, or the like is employed.
With these methods, however, a miniaturized pattern size causes an edge of a pattern to be uneven (e.g., inclined) to generate thinner regions. Consequently, the pattern itself collapses, resulting in occurrence of a foreign object.
With a miniaturized pattern, therefore, it has been impossible to simultaneously prevent all of a pattern formation failure due to shortage of a sidewall protection film at a wafer edge portion, a pattern resolution failure due to uneven thickness of an applied resist, and occurrence of a foreign object due to pattern collapse.